 gdkchan
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a731ab3a2a
Add a new JIT compiler for CPU code (#693)
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6 anni fa |
 LDj3SNuD
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e5b88de22a
Add Saddlv_V Inst. Improve Cnt_V, Dup_Gp & Ins_Gp Tests. Tuneup Cls_V & Clz_V Tests. (#720)
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6 anni fa |
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LDj3SNuD
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10c74182ba
Implement the remaining tests for Simd and Fp instructions of data processing type. Small opts. for Fmov_Ftoi/1 & Fmov_Itof/1 Insts. (#709)
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6 anni fa |
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LDj3SNuD
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1bef70c068
Add Rshrn_V & Shrn_V Sse opt.. Add Mla_V, Mls_V & Mul_V Sse opt.; add Tests. (#614)
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7 anni fa |
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LDj3SNuD
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e603b7afbc
Add Sse Opt. for S/Umax_V, S/Umin_V, S/Uaddw_V, S/Usubw_V, Fabs_S/V, Fneg_S/V Inst.; for Fcvtl_V, Fcvtn_V Inst.; and for Fcmp_S Inst.. Add/Improve other Sse Opt.. Add Tests. (#496)
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7 anni fa |
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LDj3SNuD
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1e7ea76f14
Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489)
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7 anni fa |
 Alex Barney
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9cb57fb4bb
Adjust naming conventions for Ryujinx and ChocolArm64 projects (#484)
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7 anni fa |
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LDj3SNuD
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894459fcd7
Add Fmls_Se, Fmulx_Se/Ve, Smov_S Inst.; Opt. Clz/Clz_V, Cnt_V, Shl_V, S/Ushr_V, S/Usra_V Inst.; Add 11 Tests. Some fixes. (#449)
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7 anni fa |
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LDj3SNuD
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c7387be0d2
Fix/Add 1+12 [Saturating] [Rounded] Shift Right Narrow (imm.) Instructions; add 14 Tests. Add 6 Tests for PR#405. Add 2 Tests for PR#412. (#409)
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7 anni fa |
