gdkchan
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0c87bf9ea4
Refactor CPU interface to allow the implementation of other CPU emulators (#3362)
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gdkchan
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95017b8c66
Support memory aliasing (#2954)
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FICTURE7
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9d7627af64
Add multi-level function table (#2228)
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riperiperi
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54ea2285f0
POWER - Performance Optimizations With Extensive Ramifications (#2286)
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LDj3SNuD
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567ea726e1
Add support for guest Fz (Fpcr) mode through host Ftz and Daz (Mxcsr) modes (fast paths). (#1630)
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Mary
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863edae328
shader cache: Fix Linux boot issues (#1709)
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LDj3SNuD
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6938988427
Fix Vcvt_FI & Vcvt_RM; Add Vfma_S & Vfms_S. Add Tests. (#1471)
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LDj3SNuD
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e36e97c64d
CPU: This PR fixes Fpscr, among other things. (#1433)
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LDj3SNuD
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a804db6eed
Add Fmax/minv_V & S/Ushl_S Inst.s with Tests. Fix Maxps/d & Minps/d d… (#1335)
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%!s(int64=5) %!d(string=hai) anos |
riperiperi
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d7044b10a2
Add SSE4.2 Path for CRC32, add A32 variant, add tests for non-castagnoli variants. (#1328)
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LDj3SNuD
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5e724cf24e
Add Profiled Persistent Translation Cache. (#769)
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gdkchan
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f77694e4f7
Implement a new physical memory manager and replace DeviceMemory (#856)
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Ficture Seven
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e4ee61d6c3
Improve V128 (#1097)
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LDj3SNuD
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16869402bf
Add Tbx Inst. (fast & slow paths), with Tests. (#782)
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gdkchan
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a731ab3a2a
Add a new JIT compiler for CPU code (#693)
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LDj3SNuD
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c106ae9944
Add Tbl_V Sse opt. with Tests. (#651)
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gdkchan
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a694420d11
Implement speculative translation on the CPU (#515)
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LDj3SNuD
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e603b7afbc
Add Sse Opt. for S/Umax_V, S/Umin_V, S/Uaddw_V, S/Usubw_V, Fabs_S/V, Fneg_S/V Inst.; for Fcvtl_V, Fcvtn_V Inst.; and for Fcmp_S Inst.. Add/Improve other Sse Opt.. Add Tests. (#496)
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LDj3SNuD
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1e7ea76f14
Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489)
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Alex Barney
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9cb57fb4bb
Adjust naming conventions for Ryujinx and ChocolArm64 projects (#484)
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LDj3SNuD
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e674b37710
Fix Fcvtl_V and Fcvtn_V; fix half to float conv. and add float to half conv. (full FP emu.). Add 4 FP Tests. (#468)
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LDj3SNuD
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bba9bf97d0
Add 9+7 fast/slow FP inst. impls.; add 14 FP Tests. (#437)
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LDj3SNuD
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c7387be0d2
Fix/Add 1+12 [Saturating] [Rounded] Shift Right Narrow (imm.) Instructions; add 14 Tests. Add 6 Tests for PR#405. Add 2 Tests for PR#412. (#409)
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LDj3SNuD
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ca1e37a295
Remove old Tester, update Tests (some reworks). (#400)
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Merry
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326777ca4a
Ryujinx.Tests: Add unicorn to test framework (#389)
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LDj3SNuD
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68300368d7
Add SHADD, SHSUB, UHSUB, SRHADD, URHADD, instructions; add 12 Tests. (#380)
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gdkchan
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c393cdf8e3
More flexible memory manager (#307)
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LDj3SNuD
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53934e8872
Add Saba_V, Sabal_V, Sabd_V, Sabdl_V, Uaba_V, Uabal_V; Update Uabd_V, Uabdl_V. Add 16 tests. (#204)
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%!s(int64=7) %!d(string=hai) anos |
LDj3SNuD
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8f6387128a
Add Sse Opt. for Cmeq_V_2D, Cmgt_V_2D (Reg). Add Sse Opt. for Crc32cb, Crc32ch, Crc32cw, Crc32cx. Add 10 simple tests for Fcmgt, Fcmge, Fcmeq, Fcmle, Fcmlt (S, V) (Reg, Zero). Add 2 Cnt_V tests. (#183)
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%!s(int64=7) %!d(string=hai) anos |
LDj3SNuD
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3bdd109f45
Add Cmeq_S, Cmge_S, Cmgt_S, Cmhi_S, Cmhs_S, Cmle_S, Cmlt_S (Reg, Zero) & Cmtst_S compare instructions. Add 22 compare tests (Scalar, Vector). Add Eor_V, Not_V tests. (#171)
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