 gdkchan
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2bb9b33da1
Implement Arm32 Sha256 and MRS Rd, CPSR instructions (#3544)
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3 anos atrás |
 Mary
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501c3d5cea
Implement MSR instruction for A32 (#2585)
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4 anos atrás |
 FICTURE7
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22b2cb39af
Reduce JIT GC allocations (#2515)
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4 anos atrás |
 LDj3SNuD
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e36e97c64d
CPU: This PR fixes Fpscr, among other things. (#1433)
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5 anos atrás |
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LDj3SNuD
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5e724cf24e
Add Profiled Persistent Translation Cache. (#769)
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5 anos atrás |
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gdkchan
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d9ed827696
Don't decode blocks starting outside mapped memory & undefined instead of throw on invalid sysreg coprocessor (#964)
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6 anos atrás |
 riperiperi
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b1b6f294f2
Add most of the A32 instruction set to ARMeilleure (#897)
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6 anos atrás |
