Commit History

Author SHA1 Message Date
  LDj3SNuD ffbfbb5549 Add FCVT <Hd>, <Sn> and FCVT <Sd>, <Hn> Inst.; add Tests. (#692) 7 years ago
  LDj3SNuD 16de171c44 Sse optimized the Scalar & Vector fp-to-fp conversion instructions (MNPZ & IX); added the related Tests (AMNPZ & IX). Small refactoring of existing instructions. (#676) 7 years ago
  LDj3SNuD 74da8785a5 Sse optimized the 32-bit Vector & Scalar integer-to-fp conversion instructions (signed & unsigned); added the related Gp & V_Fixed Tests (signed & unsigned). (#662) 7 years ago
  LDj3SNuD 233fc95e1e Sse optimized the Vector & Scalar fp-to-integer conversion instructions (unsigned); improved the related Tests. (#656) 7 years ago
  LDj3SNuD febc2ad6f4 Sse optimized all the fp to integer conversion instructions (signed) with Tests (signed & unsigned). (#655) 7 years ago
  LDj3SNuD 1bef70c068 Add Rshrn_V & Shrn_V Sse opt.. Add Mla_V, Mls_V & Mul_V Sse opt.; add Tests. (#614) 7 years ago
  gdkchan 504f4f4abf Remove all the calls to StaticCast methods (#605) 7 years ago
  gdkchan 9679896b94 Implement fixed-point variant of the UCVTF and SCVTF instructions (#578) 7 years ago
  LDj3SNuD 8f7fcede7f Add Smlal_Ve, Smlsl_Ve, Smull_Ve, Umlal_Ve, Umlsl_Ve, Umull_Ve Inst.; add Tests. Add Sse Opt. for Trn1/2_V and Uzp1/2_V Inst. Nits. (#566) 7 years ago
  gdkchan 36e8e074c9 Misc. CPU improvements (#519) 7 years ago
  LDj3SNuD e603b7afbc Add Sse Opt. for S/Umax_V, S/Umin_V, S/Uaddw_V, S/Usubw_V, Fabs_S/V, Fneg_S/V Inst.; for Fcvtl_V, Fcvtn_V Inst.; and for Fcmp_S Inst.. Add/Improve other Sse Opt.. Add Tests. (#496) 7 years ago
  LDj3SNuD 1e7ea76f14 Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489) 7 years ago
  Alex Barney 9cb57fb4bb Adjust naming conventions for Ryujinx and ChocolArm64 projects (#484) 7 years ago