alancnet/ryujinx

Auteur	SHA1 Message	Date
LDj3SNuD	e36e97c64d CPU: This PR fixes Fpscr, among other things. (#1433)	il y a 5 ans
Valentin PONS	3af2ce74ec Implements some 32-bit instructions (VBIC, VTST, VSRA) (#1192)	il y a 5 ans
gdkchan	c26f3774bd Implement VMULL, VMLSL, VRSHR, VQRSHRN, VQRSHRUN AArch32 instructions + other fixes (#977)	il y a 6 ans
riperiperi	b1b6f294f2 Add most of the A32 instruction set to ARMeilleure (#897)	il y a 6 ans