alancnet/ryujinx

Auteur	SHA1 Message	Date
gdkchan	a731ab3a2a Add a new JIT compiler for CPU code (#693)	il y a 6 ans
LDj3SNuD	1bef70c068 Add Rshrn_V & Shrn_V Sse opt.. Add Mla_V, Mls_V & Mul_V Sse opt.; add Tests. (#614)	il y a 7 ans
LDj3SNuD	e603b7afbc Add Sse Opt. for S/Umax_V, S/Umin_V, S/Uaddw_V, S/Usubw_V, Fabs_S/V, Fneg_S/V Inst.; for Fcvtl_V, Fcvtn_V Inst.; and for Fcmp_S Inst.. Add/Improve other Sse Opt.. Add Tests. (#496)	il y a 7 ans