 riperiperi
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fa286d3535
VABS takes one input register, not two. (#1300)
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5 лет назад |
 LDj3SNuD
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83d94b21d0
Add FMaxNmV & FMinNmV Inst.s with Test. (#1279)
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5 лет назад |
|
LDj3SNuD
|
1de16f7653
Add Fcvtas_S/V & Fcvtau_S/V. (#1018)
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6 лет назад |
 Chenj168
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31b94f4641
Move the MakeOp to OpCodeTable class, for reduce the use of ConcurrentDictionary (#996)
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6 лет назад |
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riperiperi
|
dd433c1296
Implement AESMC, AESIMC, AESE, AESD and VEOR AArch32 instructions (#982)
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6 лет назад |
 gdkchan
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c26f3774bd
Implement VMULL, VMLSL, VRSHR, VQRSHRN, VQRSHRUN AArch32 instructions + other fixes (#977)
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6 лет назад |
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gdkchan
|
89ccec197e
Implement VMOVL and VORR.I32 AArch32 SIMD instructions (#960)
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6 лет назад |
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gdkchan
|
ab3b6ea6d4
A64 SIMD LDP and STP with size = 0b11 is undefined (#971)
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6 лет назад |
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gdkchan
|
fb0939f9b6
Add SSAT, SSAT16, USAT and USAT16 ARM32 instructions (#954)
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6 лет назад |
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gdkchan
|
b8ee5b15ab
Implement FACGE and FACGT (Scalar and Vector) AArch64 SIMD instructions (#956)
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6 лет назад |
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riperiperi
|
b1b6f294f2
Add most of the A32 instruction set to ARMeilleure (#897)
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6 лет назад |
|
LDj3SNuD
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eff8379d2a
Add Sli_S/V & Sri_S/V inst.s (fast & slow paths), with Tests. (#797)
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6 лет назад |
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LDj3SNuD
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16869402bf
Add Tbx Inst. (fast & slow paths), with Tests. (#782)
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6 лет назад |
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gdkchan
|
a731ab3a2a
Add a new JIT compiler for CPU code (#693)
|
6 лет назад |
