Commit History

Autor SHA1 Mensaxe Data
  gdkchan 221270db90 More accurate impl of FMINNM/FMAXNM, add vector variants (#296) %!s(int64=7) %!d(string=hai) anos
  LDj3SNuD 5f34353dce Add SQADD, UQADD, SQSUB, UQSUB, SUQADD, USQADD, SQABS, SQNEG (Scalar, Vector) instructions; add 24 Tests. Most saturation instructions now on ASoftFallback. (#314) %!s(int64=7) %!d(string=hai) anos
  LDj3SNuD fa5545aab8 Implement Ssubw_V and Usubw_V instructions. (#287) %!s(int64=7) %!d(string=hai) anos
  LDj3SNuD 063fae50fe Fix EmitHighNarrow(), EmitSaturatingNarrowOp() when Rd == Rn || Rd == Rm (& Part != 0). Optimization of EmitVectorTranspose(), EmitVectorUnzip(), EmitVectorZip() algorithms (reduction of the number of operations and their complexity). Add 12 Tests about Trn1/2, Uzp1/2, Zip1/2 (V) instructions. (#268) %!s(int64=7) %!d(string=hai) anos
  LDj3SNuD be31f5b46d Improve CountLeadingZeros() algorithm, nits. (#219) %!s(int64=7) %!d(string=hai) anos
  gdkchan 514218ab98 Add SMLSL, SQRSHRN and SRSHR (Vector) cpu instructions, nits (#225) %!s(int64=7) %!d(string=hai) anos
  Merry 0f8f40486d ChocolArm64: More accurate implementation of Frecpe & Frecps (#228) %!s(int64=7) %!d(string=hai) anos
  gdkchan 741773910d Add SMAXP, SMINP, UMAX, UMAXP, UMIN and UMINP cpu instructions (#200) %!s(int64=7) %!d(string=hai) anos
  LDj3SNuD c228cf320d Add Rbit_V instruction. Add 8 tests (Rbit_V; Rev16_V, Rev32_V, Rev64_V). Improve CountSetBits8() algorithm. (#212) %!s(int64=7) %!d(string=hai) anos
  LDj3SNuD 53934e8872 Add Saba_V, Sabal_V, Sabd_V, Sabdl_V, Uaba_V, Uabal_V; Update Uabd_V, Uabdl_V. Add 16 tests. (#204) %!s(int64=7) %!d(string=hai) anos
  gdkchan bc26aa558a Add support for the FMLA (by element/scalar) instruction (#187) %!s(int64=7) %!d(string=hai) anos
  LDj3SNuD c818093528 Add Sqxtun_S, Sqxtun_V with 3 tests. (#188) %!s(int64=7) %!d(string=hai) anos
  LDj3SNuD 8f6387128a Add Sse Opt. for Cmeq_V_2D, Cmgt_V_2D (Reg). Add Sse Opt. for Crc32cb, Crc32ch, Crc32cw, Crc32cx. Add 10 simple tests for Fcmgt, Fcmge, Fcmeq, Fcmle, Fcmlt (S, V) (Reg, Zero). Add 2 Cnt_V tests. (#183) %!s(int64=7) %!d(string=hai) anos
  Rygnus 0bec9d8439 Add opcodes SQXTUN_S and SQXTUN_V (#184) %!s(int64=7) %!d(string=hai) anos
  gdkchan b747b23607 Add the FADDP (scalar) instruction %!s(int64=7) %!d(string=hai) anos
  Lordmau5 46dc89f8dd Implement Fabs_V (#146) %!s(int64=7) %!d(string=hai) anos
  gdkchan f9f111bc85 Add intrinsics support (#121) %!s(int64=8) %!d(string=hai) anos
  LDj3SNuD 7cda630aba Add Sqxtn_S, Sqxtn_V, Uqxtn_S, Uqxtn_V instructions and Tests (6). (#110) %!s(int64=8) %!d(string=hai) anos
  LDj3SNuD a5ad1e9a06 Add Cls_V, Clz_V, Orn_V instructions. Add 18 Tests: And_V, Bic_V, Bif_V, Bit_V, Bsl_V, Cls_V, Clz_V, Orn_V, Orr_V. (#104) %!s(int64=8) %!d(string=hai) anos
  LDj3SNuD 2ccd995cb2 Add ADDHN{2}, RADDHN{2}, SUBHN{2}, RSUBHN{2} (vector) instructions. Add 8 Tests. (#92) %!s(int64=8) %!d(string=hai) anos
  MS-DOS1999 76a5972378 Fix Fmin/max and add vector version, add and modifying fmin/max tests (#89) %!s(int64=8) %!d(string=hai) anos
  LDj3SNuD 8b75080639 Add ABS (scalar & vector), ADD (scalar), NEG (scalar) instructions. (#88) %!s(int64=8) %!d(string=hai) anos
  LDj3SNuD 7acd0e0122 Add FMUL (scalar, by element) instruction; add FRECPE, FRECPS (scalar & vector) instructions. Add 5 simple tests. (#74) %!s(int64=8) %!d(string=hai) anos
  gdkchan df3cbadceb Fix FRSQRTS and FCM* (scalar) instructions %!s(int64=8) %!d(string=hai) anos
  gdkchan 36d9130592 Add FMLS (vector) instruction %!s(int64=8) %!d(string=hai) anos
  gdkchan f15b1c76a1 Add FRSQRTS and FCM* instructions %!s(int64=8) %!d(string=hai) anos
  Merry 39f20d8d1a Implement Frsqrte_S (#72) %!s(int64=8) %!d(string=hai) anos
  gdkchan 45c078d782 Add Faddp (vector) instruction %!s(int64=8) %!d(string=hai) anos
  gdkchan 7fe12ad169 Add FNEG (vector) instruction %!s(int64=8) %!d(string=hai) anos
  gdkchan 916540ff41 Fix EXT/Widening instruction carrying garbage values on some cases, fix ABD (it shouldn't accumulate, this is another variation of the instruction) %!s(int64=8) %!d(string=hai) anos