 LDj3SNuD
|
814f75142e
Fpsr and Fpcr freed. (#3701)
|
3 lat temu |
|
LDj3SNuD
|
b9f1ff3c77
Implemented in IR the managed methods of the ShlReg region of the SoftFallback class. (#3700)
|
3 lat temu |
|
LDj3SNuD
|
7baa08dcb4
Implemented in IR the managed methods of the Saturating region ... (#3665)
|
3 lat temu |
 merry
|
f5235fff29
ARMeilleure: Hardware accelerate SHA256 (#3585)
|
3 lat temu |
 Berkan Diler
|
9ca040c0ff
Use ReadOnlySpan<byte> compiler optimization for static data (#3130)
|
4 lat temu |
 mageven
|
9bda7b4699
Implement VCNT instruction (#1963)
|
5 lat temu |
|
LDj3SNuD
|
430ba6da65
CPU (A64): Add Pmull_V Inst. with Clmul fast path for the "1/2D -> 1Q" variant & Sse fast path and slow path for both the "8/16B -> 8H" and "1/2D -> 1Q" variants; with Test. (#1817)
|
5 lat temu |
 Ficture Seven
|
e4ee61d6c3
Improve V128 (#1097)
|
6 lat temu |
 riperiperi
|
b1b6f294f2
Add most of the A32 instruction set to ARMeilleure (#897)
|
6 lat temu |
|
LDj3SNuD
|
0915731a9d
Implemented fast paths for: (#846)
|
6 lat temu |
|
LDj3SNuD
|
16869402bf
Add Tbx Inst. (fast & slow paths), with Tests. (#782)
|
6 lat temu |
 gdkchan
|
a731ab3a2a
Add a new JIT compiler for CPU code (#693)
|
6 lat temu |
