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@@ -47,6 +47,20 @@ namespace ARMeilleure.Instructions
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}
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}
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}
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}
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+ public static Operand GetIntA32AlignedPC(ArmEmitterContext context, int regIndex)
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+ {
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+ if (regIndex == RegisterAlias.Aarch32Pc)
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+ {
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+ OpCode32 op = (OpCode32)context.CurrOp;
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+
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+ return Const((int)(op.GetPc() & 0xfffffffc));
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+ }
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+ else
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+ {
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+ return Register(GetRegisterAlias(context.Mode, regIndex), RegisterType.Integer, OperandType.I32);
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+ }
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+ }
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+
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public static Operand GetVecA32(int regIndex)
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public static Operand GetVecA32(int regIndex)
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{
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{
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return Register(regIndex, RegisterType.Vector, OperandType.V128);
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return Register(regIndex, RegisterType.Vector, OperandType.V128);
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