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@@ -361,15 +361,7 @@ namespace ChocolArm64.Instruction
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{
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AOpCodeSimdShImm Op = (AOpCodeSimdShImm)Context.CurrOp;
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- Context.EmitLdvec(Op.Rn);
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- Context.EmitLdc_I4(Op.Imm - (8 << Op.Size));
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- Context.EmitLdc_I4(Op.Size);
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-
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- ASoftFallback.EmitCall(Context,
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- nameof(ASoftFallback.Shl64),
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- nameof(ASoftFallback.Shl128));
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-
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- Context.EmitStvec(Op.Rd);
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+ EmitVectorImmBinaryZx(Context, OpCodes.Shl, Op.Imm - (8 << Op.Size));
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}
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public static void Smax_V(AILEmitterCtx Context) => EmitVectorSmax(Context);
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@@ -396,15 +388,7 @@ namespace ChocolArm64.Instruction
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{
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AOpCodeSimdShImm Op = (AOpCodeSimdShImm)Context.CurrOp;
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- Context.EmitLdvec(Op.Rn);
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- Context.EmitLdc_I4((8 << (Op.Size + 1)) - Op.Imm);
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- Context.EmitLdc_I4(Op.Size);
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-
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- ASoftFallback.EmitCall(Context,
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- nameof(ASoftFallback.Sshr64),
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- nameof(ASoftFallback.Sshr128));
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-
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- Context.EmitStvec(Op.Rd);
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+ EmitVectorImmBinarySx(Context, OpCodes.Shr, (8 << (Op.Size + 1)) - Op.Imm);
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}
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public static void St__V(AILEmitterCtx Context) => EmitSimdMultLdSt(Context, IsLoad: false);
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@@ -881,6 +865,55 @@ namespace ChocolArm64.Instruction
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}
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}
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+ private static void EmitVectorImmBinarySx(AILEmitterCtx Context, OpCode ILOp, long Imm)
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+ {
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+ EmitVectorImmBinarySx(Context, () => Context.Emit(ILOp), Imm);
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+ }
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+
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+ private static void EmitVectorImmBinaryZx(AILEmitterCtx Context, OpCode ILOp, long Imm)
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+ {
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+ EmitVectorImmBinaryZx(Context, () => Context.Emit(ILOp), Imm);
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+ }
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+
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+ private static void EmitVectorImmBinarySx(AILEmitterCtx Context, Action Emit, long Imm)
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+ {
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+ EmitVectorImmBinaryOp(Context, Emit, Imm, true);
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+ }
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+
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+ private static void EmitVectorImmBinaryZx(AILEmitterCtx Context, Action Emit, long Imm)
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+ {
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+ EmitVectorImmBinaryOp(Context, Emit, Imm, false);
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+ }
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+
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+ private static void EmitVectorImmBinaryOp(AILEmitterCtx Context, Action Emit, long Imm, bool Signed)
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+ {
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+ AOpCodeSimdShImm Op = (AOpCodeSimdShImm)Context.CurrOp;
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+
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+ int Bytes = Context.CurrOp.GetBitsCount() >> 3;
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+
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+ for (int Index = 0; Index < (Bytes >> Op.Size); Index++)
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+ {
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+ Context.EmitLdvec(Op.Rd);
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+ Context.EmitLdc_I4(Index);
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+ Context.EmitLdc_I4(Op.Size);
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+
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+ EmitVectorExtract(Context, Op.Rn, Index, Signed);
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+
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+ Context.EmitLdc_I8(Imm);
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+
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+ Emit();
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+
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+ ASoftFallback.EmitCall(Context, nameof(ASoftFallback.InsertVec));
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+
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+ Context.EmitStvec(Op.Rd);
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+ }
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+
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+ if (Op.RegisterSize == ARegisterSize.SIMD64)
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+ {
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+ EmitVectorZeroUpper(Context, Op.Rd);
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+ }
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+ }
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+
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private static void EmitVectorCmp(AILEmitterCtx Context, OpCode ILOp)
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{
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AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
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@@ -936,7 +969,7 @@ namespace ChocolArm64.Instruction
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private static void EmitVectorExtract(AILEmitterCtx Context, int Reg, int Index, bool Signed)
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{
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- AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
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+ IAOpCodeSimd Op = (IAOpCodeSimd)Context.CurrOp;
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Context.EmitLdvec(Reg);
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Context.EmitLdc_I4(Index);
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